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| ? july 2004 1/19 VND830Msp double channel high side driver 1 (*) per each channel n cmos compatible inputs n open drain status outputs n on state open load detection n off state open load detection n shorted load protection n undervoltage and overvoltage shutdown n loss of ground protection n very low stand-by current n reverse battery protection (**) description the VND830Msp is a monolithic device designed in stmicroelectronics vipower m0-3 technology, intended for driving any kind of load with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). active current limitation combined with thermal shutdown and automatic restart protects the device against overload. the device detects open load condition both in on and off state. output shorted to v cc is detected in the off state. the openload threshold is aimed at detecting the 5w/12v standard bulb as an openload fault in the on state. device automatically turns off in case of ground pin disconnection. type r ds(on) i out v cc VND830Msp 60 m w (*) 6 a (*) 36 v block diagram (**) see application schematic at page 8 1 10 powerso-10 ? overtemp. 1 v cc gnd input1 output1 overvoltage logic driver 1 status1 v cc clamp undervoltage clamp 1 openload on 1 current limiter 1 openload off 1 output2 driver 2 clamp 2 openload on 2 openload off 2 overtemp. 2 input2 status2 current limiter 2 order codes package tube t&r powerso-10 ? VND830Msp VND830Msp13tr rev. 1
2/19 VND830Msp absolute maximum rating configuration diagram (top view) & suggested connections for unused and n.c. pins symbol parameter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v - i gnd dc reverse ground pin current - 200 ma i out dc output current internally limited a - i out reverse dc output current - 6 a i in dc input current +/- 10 ma i stat dc status current +/- 10 ma v esd electrostatic discharge (human body model: r=1.5k w; c=100pf) - input - status - output - v cc 4000 4000 5000 5000 v v v v e max maximum switching energy (l=1.8mh; r l =0 w ; v bat =13.5v; t jstart =150oc; i l =9a) 100 mj p tot power dissipation t c =25c 73.5 w t j junction operating temperature internally limited c t c case operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 c 1 current and voltage conventions 1 2 3 4 5 6 7 8 9 10 11 output 1 output 1 n.c. output 2 output 2 ground input 1 status 1 status 2 input 2 v cc connection / pin status n.c. output input floating x x x x to ground x through 10k w resistor i s i gnd output 2 v cc gnd status 2 input 2 i out2 i in2 i stat2 v stat2 v in2 v cc v out2 output 1 i out1 v out1 input 1 i in1 status 1 i stat1 v in1 v stat1 v f1 (*) (*) v fn = v ccn - v outn during reverse battery condition 3/19 VND830Msp thermal data (*) when mounted on a standard single-sided fr-4 board with 0.5cm 2 of cu (at least 35 m m thick). horizontal mounting and no artificial air flow. (2) when mounted on a standard single-sided fr-4 board with 6 cm 2 of cu (at least 35 m m thick). horizontal mounting and no artificial air flow. electrical characteristics (8v 4/19 VND830Msp electrical characteristics (continued) v cc - output diode status pin protections (see note 1) note 1: to ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic sig nals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the durat ion and number of activation cycles. openload detection symbol parameter test conditions min typ max unit v f forward on voltage -i out =1.3a; t j =150c 0.6 v symbol parameter test conditions min typ max unit v stat status low output voltage i stat = 1.6 ma 0.5 v i lstat status leakage current normal operation; v stat = 5v 10 m a c stat status pin input capacitance normal operation; v stat = 5v 100 pf v scl status clamp voltage i stat = 1ma i stat = - 1ma 66.8 -0.7 8v v symbol parameter test conditions min typ max unit t tsd shut-down temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c t sdl status delay in overload conditions t j >t tsd 20 m s i lim current limitation v cc =13v 5.5v < v cc < 36v 6915 15 a a v demag turn-off output clamp voltage i out =2a; l= 6mh v cc -41 v cc -48 v cc -55 v symbol parameter test conditions min typ max unit i ol openload on state detection threshold v in =5v 0.6 0.9 1.2 a t dol(on) openload on state detection delay i out =0a 200 m s v ol openload off state voltage detection threshold v in =0v 1.5 2.5 3.5 v t dol(off) openload detection delay at turn off 1000 m s 2 1 v inn v statn t dol(off) open load status timing (with external pull-up) v inn v statn over temp status timing t sdl i out < i ol v out > v ol t dol(on) t j > t tsd t sdl 5/19 VND830Msp 1 t t v outn v inn 80% 10% dv out /dt (on) t d(off) 90% dv out /dt (off) t d(on) switching time waveforms truth table conditions input output status normal operation l h l h h h current limitation l h h l x x h (t j < t tsd ) h (t j > t tsd ) l overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h output voltage > v ol l h h h l h output current < i ol l h l h h l 6/19 VND830Msp iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms 10 w 2 +25 v +50 v +75 v +100 v 0.2 ms 10 w 3a -25 v -50 v -100 v -150 v 0.1 m s 50 w 3b +25 v +50 v +75 v +100 v 0.1 m s 50 w 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 w 5 +26.5 v +46.5 v +66.5 v +86.5 v 400 ms, 2 w iso t/r 7637/1 test pulse test levels results i ii iii iv 1c c c c 2c c c c 3acccc 3bcccc 4c c c c 5c e e e electrical transient requirements on v cc pin class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 7/19 VND830Msp 1 figure 1: waveforms open load without external pull-up status n input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc status n input n status n status n input n status n input n open load with external pull-up undefined overtemperature input n status n t tsd t r t j output voltage n v cc 8/19 VND830Msp gnd protection network against reverse battery solution 1: resistor in the ground line (r gnd only). this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1) r gnd 600mv / i s(on)max . 2) r gnd 3 (- v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the devices datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsd. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not common with the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the st suggests to utilize solution 2 (see below). solution 2: a diode (d gnd ) in the ground line. a resistor (r gnd =1k w) should be inserted in parallel to d gnd if the device will be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network will produce a shift ( j 600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. 1 application schematic 1 v cc output2 d ld +5v r prot output1 status1 input1 +5v status2 input2 gnd +5v m c r prot r prot r prot d gnd r gnd v gnd 9/19 VND830Msp load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds v cc max dc rating. the same applies if the device will be subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/1 table. m c i/os protection: if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the m c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of m c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of m c i/os. -v ccpeak /i latchup r prot (v oh m c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 3 20ma; v oh m c 3 4.5v 5k w r prot 65k w . recommended r prot value is 10k w. open load detection in off state off state open load detection requires an external pull-up resistor (r pu ) connected between output pin and a positive supply voltage (v pu ) like the +5v line used to supply the microprocessor. the external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid v out to be higher than v olmin ; this results in the following condition v out =(v pu /(r l +r pu ))r l 11/19 VND830Msp input hysteresis voltage input low level on state resistance vs t case on state resistance vs v cc input high level openload on state detection threshold -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 20 40 60 80 100 120 140 160 ron (mohm) iout=2a vcc=8v; 13v & 36v 5 10152025303540 vcc (v) 0 10 20 30 40 50 60 70 80 90 100 110 120 ron (mohm) iout=5a tc= - 40c tc=25c tc=150c -50 -25 0 25 50 75 100 125 150 175 tc (oc) 750 800 850 900 950 1000 1050 1100 1150 1200 1250 iol (ma) vcc=13v vin=5v -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) 12/19 VND830Msp overvoltage shutdown turn-on voltage slope turn-off voltage slope i lim vs t case openload off state voltage detection threshold -50 -25 0 25 50 75 100 125 150 175 tc (c) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vol (v) vin=0v -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 100 200 300 400 500 600 700 800 dvout/dt(on) (v/ms) vcc=13v rl=6.5ohm -50 -25 0 25 50 75 100 125 150 175 tc (oc) 200 250 300 350 400 450 500 550 600 dvout/dt(off) (v/ms) vcc=13v rl=6.5ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 18 20 ilim (a) vcc=13v 13/19 VND830Msp maximum turn off current versus load inductance a = single pulse at t jstart =150oc b= repetitive pulse at t jstart =100oc c= repetitive pulse at t jstart =125oc conditions: v cc =13.5v values are generated with r l =0 w in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. v in , i l t demagnetization demagnetization demagnetization 1 10 100 0.1 1 10 100 l(mh) i lmax (a) a b c 14/19 VND830Msp powerso-10 ? pc board r thj-amb vs pcb copper area in open box free air condition powerso-10 ? thermal data layout condition of r th and z th measurements (pcb fr4 area= 58mm x 58mm, pcb thickness=2mm, cu thickness=35 m m, copper areas: from minimum pad lay-out to 8cm 2 ). 30 35 40 45 50 55 0246810 pcb cu heatsink area (cm^2) rthj_amb (c/w) tj-tamb=50c 15/19 VND830Msp thermal fitting model of a double channel hsd in powerso-10 pulse calculation formula thermal parameter area/island (cm 2 ) 0.5 6 r1 (c/w) 0.15 r2 (c/w) 0.8 r3( c/w) 0.7 r4 (c/w) 0.8 r5 (c/w) 12 r6 (c/w) 37 22 c1 (w.s/c) 0.0006 c2 (w.s/c) 2.10e-03 c3 (w.s/c) 0.013 c4 (w.s/c) 0.3 c5 (w.s/c) 0.75 c6 (w.s/c) 3 5 z th d r th d z thtp 1 d C () + = where d t p t = powerso-10 thermal impedance junction ambient single pulse t_amb pd1 c1 r4 c3 c4 r3 r1 r6 r5 r2 c5 c6 c2 pd2 r2 c1 c2 r1 tj_1 tj_2 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) 0.5 cm 2 6 cm 2 16/19 VND830Msp 1 1 1 1 dim. mm. inch min. typ max. min. typ. max. a 3.35 3.65 0.132 0.144 a (*) 3.4 3.6 0.134 0.142 a1 0.00 0.10 0.000 0.004 b 0.40 0.60 0.016 0.024 b (*) 0.37 0.53 0.014 0.021 c 0.35 0.55 0.013 0.022 c (*) 0.23 0.32 0.009 0.0126 d 9.40 9.60 0.370 0.378 d1 7.40 7.60 0.291 0.300 e 9.30 9.50 0.366 0.374 e2 7.20 7.60 0.283 300 e2 (*) 7.30 7.50 0.287 0.295 e4 5.90 6.10 0.232 0.240 e4 (*) 5.90 6.30 0.232 0.248 e 1.27 0.050 f 1.25 1.35 0.049 0.053 f (*) 1.20 1.40 0.047 0.055 h 13.80 14.40 0.543 0.567 h (*) 13.85 14.35 0.545 0.565 h 0.50 0.002 l 1.20 1.80 0.047 0.070 l (*) 0.80 1.10 0.031 0.043 a 0o 8o 0o 8o a (*) 2o 8o 2o 8o 1 1 powerso-10 ? mechanical data (*) muar only poa p013p detail "a" plane seating a l a1 f a1 h a d d1 = = = = e4 0.10 a e c a b b detail "a" seating plane e2 10 1 eb he 0.25 p095a 17/19 VND830Msp 1 powerso-10 ? suggested pad layout 1 tape and reel shipment (suffix 13tr) reel dimensions all dimensions are in mm. base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed 6.30 10.8 - 11 14.6 - 14.9 9.5 1 2 3 4 5 1.27 0.67 - 0.73 0.54 - 0.6 10 9 8 7 6 b a c all dimensions are in mm. base q.ty bulk q.ty tube length ( 0.5) a b c ( 0.1) casablanca 50 1000 532 10.4 16.4 0.8 muar 50 1000 532 4.9 17.2 0.8 tube shipment (no suffix) c a b muar casablanca 18/19 VND830Msp 1 1 1 1 revision history date revision description of changes jul 2004 1 - minor changes - current and voltage convention update (page 2). - configuration diagram (top view) & suggested connections for unused and n.c. pins insertion (page 2). - 6 cm 2 cu condition insertion in thermal data table (page 3). - v cc - output diode section update (page 4). - protections note insertion (page 4) - revision history table insertion (page 18). - disclaimers update (page 19). 1 19/19 VND830Msp 1 1 1 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a trademark of stmicroelectronics. all other names are the property of their respective owners ? 2004 stmicroelectronics - printed in italy- all rights reserved. stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states http://www.st.com |
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